System:
- ARM Cortex-M0 processor, running at frequencies of up to 50 MHz.
- ARM Cortex-M0 built-in Nested Vectored Interrupt Controller (NVIC).
- Serial Wire Debug.
- System tick timer.
Memory:
- 32 kB (LPC1114), 24 kB (LPC1113), 16 kB (LPC1112), or 8 kB (LPC1111) on-chip flash programming memory.
- 8 kB, 4 kB, or 2 kB SRAM.
- In-System Programming (ISP) and In-Application Programming (IAP) via on-chip bootloader software.
Digital peripherals:
- Up to 42 General Purpose I/O (GPIO) pins with configurable pull-up/pull-down resistors.
- GPIO pins can be used as edge and level sensitive interrupt sources.
- High-current output driver (20 mA) on one pin.
- High-current sink drivers (20 mA) on two I2C-bus pins in Fast-mode Plus.
- Four general purpose counter/timers with a total of four capture inputs and 13 match outputs.
- Programmable WatchDog Timer (WDT).
Analog peripherals:
- 10-bit ADC with input multiplexing among 8 pins.
Serial interfaces:
- UART with fractional baud rate generation, internal FIFO, and RS-485 support.
- Two SPI controllers with SSP features and with FIFO and multi-protocol capabilities (second SPI on LQFP48 and PLCC44 packages only).
- I2C-bus interface supporting full I2C-bus specification and Fast-mode Plus with a data rate of 1 Mbit/s with multiple address recognition and monitor mode.
Clock generation:
- 12 MHz internal RC oscillator trimmed to 1 % accuracy that can optionally be used as a system clock.
- Crystal oscillator with an operating range of 1 MHz to 25 MHz.
- Programmable watchdog oscillator with a frequency range of 7.8 kHz to 1.8 MHz.
- PLL allows CPU operation up to the maximum CPU rate without the need for a high-frequency crystal. May be run from the system oscillator or the internal RC oscillator.
- Clock output function with divider that can reflect the system oscillator clock, IRC clock, CPU clock, and the Watchdog clock.
Power control:
- Integrated PMU (Power Management Unit) to minimize power consumption during Sleep, Deep-sleep, and Deep power-down modes.
- Power profiles residing in boot ROM allowing to optimize performance and minimize power consumption for any given application through one simple function call. (LPC1100L series, on LPC111x/102/202/302 only.)
- Three reduced power modes: Sleep, Deep-sleep, and Deep power-down.
- Processor wake-up from Deep-sleep mode via a dedicated start logic using up to 13 of the functional pins.
- Power-On Reset (POR).
- Brownout detect with four separate thresholds for interrupt and forced reset.
Unique device serial number for identification.
Single power supply (1.8 V to 3.6 V).
Available as 48-pin LQFP package



Development Board for this IC, please check this

DST-ARM Development Board

Low Cost System for this IC, please check this

DST ARM Stamp LPC1114 ARM Low Cost System + RS232 Cable

Untuk informasi lebih lanjut, lihat penjelasan produk ini di data sheet.